1. Field of the Invention
The present invention generally relates to transmission lines for microcircuits. More particularly, this invention relates to a diffusion barrier for low-resistance gate conductors for metal-oxide-semiconductor field-effect transistors (MOSFETs), in which the diffusion barrier is formed of a semi-insulating material that is able to prevent degradation of a gate conductor at high processing temperatures encountered during the fabrication of MOSFET and CMOS devices.
2. Description of the Prior Art
As known in the art, the gate of a field effect transistor (FET) typically includes a gate insulator over a semiconductor substrate, over which a polysilicon gate electrode is formed to which a voltage is applied to invert the surface of the substrate beneath the electrode, forming a channel through which electrons or holes flow from the source toward the drain of the transistor. The gate structure further includes a gate conductor that is electrically connected with the gate electrode, and by which the gate signal is delivered to the gate electrode. In addition to having low electrical resistance to minimize gate signal delay, the gate conductor of a MOSFET is often required to withstand high processing temperatures, for example, above 1050xc2x0 C. for junction activation. This process integration constraint has necessitated a tradeoff between the conductivity and thermal stability of the gate conductor material. Gate conductors formed of tungsten or titanium suicides (TiSix) have low resistivities, on the order of about 15 to 20 micro-ohmsxc2x7cm, but cannot withstand junction activation without degradation from interdiffusion with the polysilicon gate electrode, leading to a sharp increase in resistivity and/or causing a depletion of dopant from the gate electrode. Furthermore, TiSix tends to agglomerate at temperatures above about 900xc2x0 C., and pure tungsten reacts with polysilicon at temperatures above about 750xc2x0 C. to form tungsten silicides (WSix), which exhibit high resistivities on the order of about 200 micro-ohmsxc2x7cm, and therefore undesirably increase gate propagation delay. Even so, tungsten silicides are more thermally stable as compared to tungsten metal and titanium silicides, and are therefore employed as the material for gate conductors if processing temperatures will exceed the capability of tungsten and titanium silicide.
One known approach to prevent degradation of a gate structure having a tungsten gate conductor is to provide a diffusion barrier between the conductor and polysilicon electrode. In order to avoid undue delay in the gate signal, more current leakage through the diffusion barrier is better. Consequently, conventional wisdom has been to use conductive materials, such as TiN, TaSiN or tungsten nitride (WNx) as the diffusion barrier material. However, conductive diffusion barrier materials such as TiN and TaSiN are limited to processing temperatures of less than about 900xc2x0 C. in order to prevent breakdown of the material (TiN and WNx) or prevent thermal oxidation of the material (TiN or TaSiN). Accordingly, conductive diffusion barrier materials currently available cannot withstand temperatures sufficient for junction activation and other high-temperature processes necessary in the fabrication of MOSFETs, or are otherwise not sufficiently oxidation resistant or compatible with integrated circuit manufacturing to successfully serve as a diffusion barrier for a gate electrode.
In view of the above, what is needed is a gate structure that is capable of withstanding processing temperatures above 900xc2x0 C., and preferably at least 1050xc2x0 C. for junction activation, without significantly increasing gate propagation delay.
The present invention provides a gate structure for a semiconductor device, and particularly a MOSFET for such applications as CMOS technology. The gate structure of this invention can employ a gate conductor that has relatively low resistivity, e.g., tungsten or titanium silicide, yet remains thermally stable at processing temperatures above 900xc2x0 C. As a result, the gate structure can exhibit low gate propagation delay while also being capable of withstanding high temperature processes such as junction activation.
As with conventional processes, the gate structure of this invention generally entails an electrical insulating layer on a semiconductor substrate, over which a polysilicon gate electrode is formed. The gate structure further includes a gate conductor that is electrically connected with the electrode via a diffusion barrier, which separates the gate electrode and gate conductor to prevent interdiffusion therebetween. Because the gate electrode voltage controls the speed of the transistor, the voltage drop across the diffusion barrier must be minimal in order to achieve a maximum switching speed for the transistor at a given swing of the gate voltage. For this reason, only highly conductive materials have been considered in the past as potential candidates for diffusion barrier of gate structures. Conductive materials such as metals and certain semimetals, metal silicides, metal nitrides, and doped semiconductors generally have resistivities in the range of about 10xe2x88x926 to 10xe2x88x922 ohms-cm. On the other hand, typical insulator materials have resistivities in the range of about 106 to 1018 ohms-cm. A material having a resistivity between 10xe2x88x922 and 106 ohms-cm (i.e., between that of xe2x80x9cgoodxe2x80x9d conductor materials and xe2x80x9cgoodxe2x80x9d insulator materials) may be referred to as either an imperfect insulator or a poor conductor, depending of whether its resistivity is closer to that of an insulator or conductor material.
Contrary to conventional wisdom, the diffusion barrier of this invention is a very thin layer of a material with semi-insulating properties, which are defined by the ability of the diffusion barrier to allow for a flow of the leakage current (expressed in Amps per unit of area at a specified voltage). According to the invention, transistor speed is not significantly affected if the diffusion barrier provides sufficient capacitive coupling between the gate conductor and electrode, and/or allows sufficient leakage current from the gate conductor to the electrode. For example, a sufficient leakage current through a diffusion barrier is in the range of about 10xe2x88x928 to 1 A/xcexcm2 based on one Volt bias across the barrier. Both leakage current and the degree of gate electrode charging due to capacitive coupling is increased as the thickness of the diffusion barrier is reduced.
In general, the leakage current may not be a linear function of the voltage across the diffusion barrier, such that barrier resistance and resistivity may depend on the voltage. Nevertheless, a comparison of the resistance, resistivity, and leakage current of semi-insulating materials at a specified voltage has demonstrated that very thin (e.g., about 0.5 to about 10 nm) semi-insulating (bulk resistivity of between 10xe2x88x922 and 106 ohms-cm) diffusion barriers have leakage currents within the above-noted desired range of 10xe2x88x928 to 1 A/xcexcm2 at 1 Volt bias. In contrast, based on a typical contact resistance (resistance of unit contact area) of less than 10xe2x88x928 ohm-cm2, conventional conductive diffusion barriers have a leakage current of more than 1 A/xcexcm2 at 1 Volt bias. The same is true even for very thin (e.g., about 0.5 to about 10 nm) conductive diffusion barriers. Accordingly, the semi-insulating diffusion barriers of this invention are also distinguishable from conventional conductive diffusion barriers by having lower leakage currents.
The semi-insulating quality of the diffusion barrier of this invention can be achieved by employing one of several techniques or their combinations. In one approach, the thickness of a diffusion barrier formed of a good bulk insulator is optimized to allow for a sufficient tunneling current while preventing diffusion and intermixing of gate conductor and electrode materials during high-temperature processing. In another approach, the barrier material is formed of an insulating material that contains a large number of structural and chemical defects and/or dopants that increase electrical leakage but do not change the diffusion-inhibiting property of the barrier.
In view of the above, it can be appreciated that the present invention establishes that effective diffusion barriers for MOSFET gates can be formed from materials other than the highly conductive materials typically used in the prior art. In fact, diffusion barriers can be formed of very poor conductor (semi-insulating) materials with minimal effect on transistor speed. Accordingly, the invention is distinguishable from the prior art in part on the basis of the resistivity of the diffusion barrier, which allows for the use of a class of materials that includes, among others, thin tunneling insulators (also referred to as quantum conductive materials). As a result of the broader selection of materials that can be used for the gate diffusion barrier of this invention, and particularly semi-insulating materials capable of inhibiting diffusion at temperatures above 900xc2x0 C., the present invention also allows for the use of gate conductors formed of low-resistivity but thermally unstable materials such as tungsten or TiSix, which would otherwise be susceptible to high-temperature interdiffusion with the polysilicon gate electrode if exposed to processing temperatures beyond the capability of prior art conductive diffusion barriers. As a result, the material for the gate conductor can be chosen on the basis of minimizing gate propagation delay, thereby improving the overall performance of the device without concern for interdiffusion and its consequences, e.g., thermal degradation of the gate structure, increase in resistivity of the conductor, and depletion of dopant from the gate electrode.
Other objects and advantages of this invention will be better appreciated from the following detailed description.